US 11,901,219 B2
Methods of forming semiconductor device structures
Yi-Wen Pan, New Taipei (TW); You-Lan Li, Hsinchu (TW); and Chung-Chi Ko, Nantou (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Aug. 19, 2021, as Appl. No. 17/406,920.
Prior Publication US 2023/0057914 A1, Feb. 23, 2023
Int. Cl. H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 21/762 (2006.01)
CPC H01L 21/76814 (2013.01) [H01L 21/76224 (2013.01); H01L 21/76877 (2013.01); H01L 21/823431 (2013.01); H01L 21/823475 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
forming an interconnect structure over a substrate, comprising:
forming a dielectric layer; then
performing an annealing process; then
forming one or more openings in the dielectric layer; then
performing a first ultraviolet (UV) curing process; then
forming conductive features in the one or more openings; then
forming a cap layer on the conductive feature, wherein the cap layer comprises a metal and is formed by a plasma enhanced chemical vapor deposition process; and then
performing a second UV curing process after forming the cap layer.