US 11,899,985 B1
Virtual modules in TCAM
Sohail A Syed, San Jose, CA (US); Hillel Gazit, Palo Alto, CA (US); Hon Luu, San Jose, CA (US); and Pranab Ghosh, Pleasonton, CA (US)
Assigned to DreamBig Semiconductor Inc., San Jose, CA (US)
Filed by DreamBig Semiconductor Inc., San Jose, CA (US)
Filed on Mar. 31, 2022, as Appl. No. 17/710,840.
Claims priority of provisional application 63/168,921, filed on Mar. 31, 2021.
Int. Cl. G06F 3/06 (2006.01); G06F 9/455 (2018.01)
CPC G06F 3/0664 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0673 (2013.01); G06F 9/45558 (2013.01); G06F 2009/45583 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A content addressable memory circuit comprising:
a memory device array including multiple memory devices coupled for simultaneous access to memory address locations that share a common memory address;
multiple virtual modules (VMs), wherein each VM,
stores a data set that includes key values stored within an assigned memory address range within the memory array that are assigned to the VM,
stores a virtual hash table in non-transitory memory, that associates hash values with memory addresses within the assigned memory address range of the VM;
an interface to receive a key value and to receive a VM identifier;
an information structure that indicates different assigned memory address ranges for two or more of the multiple VMs;
hash logic to determine a hash value, based upon a received key value and a respective assigned memory address range indicated in the information structure for a VM identified by a received VM identifier; and
memory controller logic to use a virtual hash table of the identified VM to access a memory address in the assigned memory address range of the identified VM, based upon the determined hash value.