US 11,899,942 B2
Memory systems and devices including examples of accessing memory and generating access codes using an authenticated stream cipher
Jeremy Chritz, Seattle, WA (US); and David Hulton, Seattle, WA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Dec. 23, 2022, as Appl. No. 18/146,120.
Application 18/146,120 is a continuation of application No. 17/108,904, filed on Dec. 1, 2020, granted, now 11,537,298.
Prior Publication US 2023/0126741 A1, Apr. 27, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01); G06F 12/0877 (2016.01); H04L 9/06 (2006.01)
CPC G06F 3/0622 (2013.01) [G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 12/0877 (2013.01); H04L 9/0631 (2013.01); G06F 2212/60 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
receiving, from a host computing device, a write command, an address, and write data for a memory device;
responsive to the write command:
generating an error correction code for the write data;
generating an access code by using the address as an initialization vector for an authenticated stream cipher; and
concurrent to generation of the access code, performing address translation using the write command and the address to translate a logical memory address of the address to a physical memory address of the memory device; and
performing a write operation associated with the write command using the access code, the write data, the error correction code, and the physical memory address.