US 11,899,829 B2
Memory systems and devices including examples of generating access codes for memory regions using authentication logic
Jeremy Chritz, Seattle, WA (US); and David Hulton, Seattle, WA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Dec. 1, 2020, as Appl. No. 17/108,934.
Prior Publication US 2022/0171887 A1, Jun. 2, 2022
Int. Cl. G06F 21/79 (2013.01); G06F 21/44 (2013.01); G06F 21/31 (2013.01); G06F 21/60 (2013.01); G06F 13/16 (2006.01); H04L 9/06 (2006.01); G06F 12/14 (2006.01)
CPC G06F 21/79 (2013.01) [G06F 12/1433 (2013.01); G06F 13/1668 (2013.01); G06F 21/31 (2013.01); G06F 21/602 (2013.01); G06F 21/604 (2013.01); H04L 9/0643 (2013.01)] 17 Claims
OG exemplary drawing
 
1. A method comprising:
generating, at a memory controller comprising authentication logic, a plurality of access codes, each access code of the plurality of access codes for a respective memory region of a plurality of memory regions of a memory device of a plurality of memory devices based partly on a provisioned key;
writing the plurality of access codes to a cache coupled to the memory controller; and
writing, via a memory bus, each respective access code of the plurality of access codes to a cache of the memory device;
obtaining, from a host computing device, a memory access request associated with the memory device of the plurality of memory devices, the memory access request comprising a memory address of the memory device and an access code;
responsive to the memory access request:
comparing, at the authentication logic, the access code with the stored plurality of access codes in the cache of the memory controller by:
matching the access code to one of the stored plurality of access codes; and
authenticating a memory command based on the matched access code, the memory command including a physical memory address in the corresponding memory region associated with the matched access code; and
responsive to matching the access code, performing a memory access operation associated with the memory access request.