US 11,899,828 B2
Method and apparatus for protecting a PUF generator
Shih-Lien Linus Lu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu (TW)
Filed on Jul. 7, 2022, as Appl. No. 17/859,513.
Application 17/859,513 is a continuation of application No. 16/943,533, filed on Jul. 30, 2020, granted, now 11,409,915.
Application 16/943,533 is a continuation of application No. 16/019,283, filed on Jun. 26, 2018, granted, now 10,733,327.
Prior Publication US 2022/0343032 A1, Oct. 27, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 21/75 (2013.01); H04L 9/00 (2022.01); G11C 11/412 (2006.01); G11C 11/418 (2006.01); H03K 19/003 (2006.01); G11C 11/419 (2006.01); H04L 9/32 (2006.01)
CPC G06F 21/755 (2017.08) [G11C 11/412 (2013.01); G11C 11/418 (2013.01); G11C 11/419 (2013.01); H03K 19/00315 (2013.01); H04L 9/002 (2013.01); H04L 9/3278 (2013.01)] 20 Claims
OG exemplary drawing
 
18. A method, comprising:
monitoring voltage changes of a supply voltage of a memory cell array, wherein the memory cell array comprises a plurality of bit cells whose stable logical states upon a power-up of the memory cell array are used to generate a physical unclonable function (PUF) signature;
detecting a voltage tempering event of the supply voltage; and
setting each of the plurality of bit cells to its initial logical state based on the voltage tempering event.