US 11,899,563 B2
System on a chip with an integrated configurable safety master microcontroller unit
Venkateswar Kowkutla, Allen, TX (US); Raghavendra Santhanagopal, Dallas, TX (US); Chunhua Hu, Plano, TX (US); Anthony Frederick Seely, Wylie, TX (US); Nishanth Menon, Plano, TX (US); Rajesh Kumar Vanga, Bangalore (IN); Rejitha Nair, Southlake, TX (US); Siva Srinivas Kothamasu, Frisco, TX (US); Kazunobu Shin, Plano, TX (US); Jason Peck, Sugar Land, TX (US); and John Apostol, Richardson, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Mar. 3, 2022, as Appl. No. 17/686,348.
Claims priority of provisional application 63/294,428, filed on Dec. 29, 2021.
Prior Publication US 2023/0205672 A1, Jun. 29, 2023
Int. Cl. G06F 13/10 (2006.01); G06F 11/36 (2006.01); G06F 9/4401 (2018.01); G06F 11/30 (2006.01)
CPC G06F 11/3656 (2013.01) [G06F 9/4401 (2013.01); G06F 11/3048 (2013.01); G06F 13/102 (2013.01); G06F 2201/86 (2013.01); G06F 2213/0038 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system on a chip (SoC) comprising:
a first domain comprising a first processor configured to boot the SoC, and a first debug subsystem;
a second domain comprising a second processor, the second domain configurable as either a safety domain or a general-purpose domain; and
isolation circuitry between the first domain and the second domain;
wherein during boot-up of the SoC, the first processor provides code to the second domain which, when executed by the second processor, configures the second domain as either the safety domain or as the general-purpose processing domain.