| CPC G06F 11/364 (2013.01) [G06F 9/30098 (2013.01); G06F 9/3877 (2013.01); G06F 9/522 (2013.01); G06F 12/0811 (2013.01); G06F 12/0835 (2013.01)] | 20 Claims |
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1. A tracing coprocessor that records execution trace data on behalf of a primary processor, based on a cache coherency protocol (CCP) message received from the primary processor, the tracing coprocessor comprising circuitry and logic that causes the tracing coprocessor to at least:
listen on a bus that communicatively couples the tracing coprocessor with the primary processor;
based on listening on the bus, identify at least one CCP message sent by the primary processor onto the bus, the at least one CCP message relating to activity at a processor cache of the primary processor, the activity resulting from the primary processor executing at least one executable code instruction, the activity comprising a cache miss that influxes a memory cell data value into the processor cache of the primary processor;
determine, from the at least one CCP message, that the primary processor caused the memory cell data value to be influxed to the processor cache of the primary processor as part of a memory cell consumption by the primary processor;
using direct memory access (DMA), obtain the memory cell data value consumed by the primary processor in connection with execution of the at least one executable code instruction directly from a system memory; and
initiate logging of the memory cell data value obtained directly from system memory using DMA into an execution trace.
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