CPC G03F 7/2061 (2013.01) [G03F 1/36 (2013.01); G03F 1/78 (2013.01)] | 20 Claims |
1. An electron beam lithography system comprising:
a processor; and
a non-transitory computer-readable medium having stored thereon computer-readable instructions, wherein the computer-readable instructions are executable by the processor to cause the electron beam lithography system to perform operations that include:
receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout, and
inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout, wherein the electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.
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