CPC G01S 7/352 (2013.01) [G01S 7/023 (2013.01); G01S 7/4004 (2013.01); G01S 13/34 (2013.01); G01S 13/584 (2013.01); G01S 13/588 (2013.01); G01S 13/931 (2013.01); H01Q 3/267 (2013.01); G01S 7/356 (2021.05)] | 20 Claims |
1. A multiple input, multiple output (MIMO) radar system on an integrated circuit chip, the MIMO radar comprising:
a first plurality of transmitters and a first plurality of receivers arranged on a first circuit chip, wherein the first plurality of receivers is configured to produce a first set of range, Doppler, and virtual receiver data, and wherein the first circuit chip is configured to select a first subset of data from the first set of range, Doppler, and virtual receiver data; and
a second plurality of transmitters and a second plurality of receivers arranged on a second circuit chip, wherein the second plurality of receivers is configured to produce a second set of range, Doppler, and virtual receiver data, wherein the second circuit chip is configured to select a second subset of data from the second set of range, Doppler, and virtual receiver data, and wherein the second subset of data from the second circuit chip comprises a second plurality of range/Doppler selections for a second data bitmap, and the first subset of data from the first circuit chip comprises a first plurality of range/Doppler selections for a first data bitmap, and wherein the first plurality of range/Doppler selections and corresponding first data bitmap are different from the second plurality of range/Doppler selections and corresponding second data bitmap; and
a central processing unit configured to receive the first and second selected subsets of range, Doppler, and virtual receiver data from the first circuit chip and the second circuit chip, respectively;
wherein the first circuit chip and the second circuit chip are part of the integrated circuit chip.
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