| CPC H10N 70/041 (2023.02) [H10B 63/80 (2023.02); H10N 70/021 (2023.02); H10N 70/826 (2023.02); H10N 70/841 (2023.02); H10N 70/8833 (2023.02)] | 20 Claims |

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1. A resistive switching device comprising:
a metal interconnect electrode; and
a charge-particle-treated memory stack over the metal interconnect electrode;
wherein the memory stack comprises a plurality of layers that includes a top electrode, a bottom electrode, and a dielectric layer between the top electrode and the bottom electrode;
wherein the dielectric layer comprises a portion of a blanket dielectric layer;
wherein the bottom electrode comprises a portion of a blanket bottom electrode layer; and
wherein the charge-particle-treated memory stack further comprises a current-conducting filament characteristic that results from charge particle treatments applied while a top surface of the blanket dielectric layer is exposed and a top surface of the blanket bottom electrode is exposed.
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