US 12,225,786 B2
Display panel and display device each having an upper cathode layer including a plurality of spaced-apart cathode patterns connected to lower second cathode layer via first connection portion
Cong Liu, Beijing (CN); Yao Huang, Beijing (CN); Binyan Wang, Beijing (CN); Weiyun Huang, Beijing (CN); and Yue Long, Beijing (CN)
Assigned to CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/437,917
Filed by CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., Sichuan (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Dec. 1, 2020, PCT No. PCT/CN2020/133160
§ 371(c)(1), (2) Date Sep. 10, 2021,
PCT Pub. No. WO2022/116010, PCT Pub. Date Jun. 9, 2022.
Prior Publication US 2022/0352289 A1, Nov. 3, 2022
Int. Cl. H10K 59/131 (2023.01); H10K 50/822 (2023.01); H10K 59/35 (2023.01)
CPC H10K 59/131 (2023.02) [H10K 50/822 (2023.02); H10K 59/351 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a base substrate comprising a first display region, a second display region, and a routing region;
a first anode layer, a first light-emitting layer, and a first cathode layer disposed in the first display region and sequentially stacked in a direction going away from the base substrate;
a second cathode layer, a second anode layer, a second light-emitting layer, and a third cathode layer disposed in the second display region and sequentially stacked in the direction going away from the base substrate, wherein the third cathode layer comprises: a plurality of first cathode patterns spaced apart, at least one of the plurality of first cathode patterns comprising a first connecting portion via which the at least one of the plurality of first cathode patterns is connected to the second cathode layer; the second anode layer, the second light-emitting layer and the third cathode layer being dividable into a plurality of first sub-pixels, an orthographic projection of a light-emitting region of at least one of the plurality of first sub-pixels on the base substrate being within an overlapping region between the second cathode layer and the third cathode layer; and
a first signal transmission layer disposed in the routing region, wherein a signal transmitted by the first signal transmission layer is different from signals transmitted by the first anode layer and the second anode layer;
wherein an orthographic projection of the first signal transmission layer on the base substrate is partially overlapped with an orthographic projection of the second cathode layer on the base substrate, the first signal transmission layer comprises: a second connecting portion, the first signal transmission layer being connected to the second cathode layer via the second connecting portion; the orthographic projection of the first signal transmission layer on the base substrate is partially overlapped with an orthographic projection of the first cathode layer on the base substrate, and the first signal transmission layer is connected to the first cathode layer; and the first signal transmission layer is further configured to receive a power supply signal.