| CPC H10K 59/131 (2023.02) [G09G 2300/0426 (2013.01); G09G 2300/0833 (2013.01); G09G 2300/0842 (2013.01); G09G 2310/08 (2013.01); G09G 2320/02 (2013.01); H10K 59/121 (2023.02)] | 30 Claims |

|
1. A display substrate, comprising a base substrate and a sub-pixel on the base substrate, wherein the sub-pixel comprises a pixel circuit, and the pixel circuit comprises a data writing sub-circuit, a storage sub-circuit, a driving sub-circuit, and a resistance device,
the data writing sub-circuit is electrically connected with a first terminal of the storage sub-circuit, and is configured to transmit a data signal to the first terminal of the storage sub-circuit in response to a control signal,
the driving sub-circuit comprises a control electrode, a first electrode and a second electrode, the control electrode of the driving sub-circuit is electrically connected with the first terminal of the storage sub-circuit, the first electrode of the driving sub-circuit is configured to receive a first power supply voltage, and the second electrode of the driving sub-circuit is electrically connected with a first terminal of the resistance device;
a second terminal of the resistance device is configured to be electrically connected with a first electrode of a light-emitting element, and the driving sub-circuit is configured to drive the light-emitting element to emit light in response to a voltage at the first terminal of the storage sub-circuit; and
the resistance device and the control electrode of the driving sub-circuit are in a same layer and insulated from each other, and a resistivity of the resistance device is higher than a resistivity of the control electrode of the driving sub-circuit;
the control signal comprises a first control signal, the data writing sub-circuit comprises a first data writing transistor, the driving sub-circuit comprises a driving transistor, the first data writing transistor is a P-type metal-oxide semiconductor field effect transistor, and the driving transistor is an N-type metal-oxide semiconductor field effect transistor;
a gate electrode of the first data writing transistor is configured to receive the first control signal, a first electrode of the first data writing transistor is configured to receive the data signal, a second electrode of the first data writing transistor is electrically connected with the first terminal of the storage sub-circuit and the control electrode of the driving sub-circuit; and
a gate electrode, a first electrode and a second electrode of the driving transistor respectively serve as the control electrode, the first electrode and the second electrode of the driving sub-circuit;
the storage sub-circuit comprises a storage capacitor, the storage capacitor comprises a first capacitor electrode and a second capacitor electrode, and the first capacitor electrode and the second capacitor electrode respectively serve as the first terminal and a second terminal of the storage sub-circuit; and
the first capacitor electrode and the resistance device are in a same layer and insulated from each other.
|