US 12,225,771 B2
Display device and method of manufacturing the same
Hyungjun Kim, Seoul (KR); Soyoung Koo, Yongin-si (KR); Eok Su Kim, Seoul (KR); Yunyong Nam, Hwaseong-si (KR); Jun Hyung Lim, Seoul (KR); and Kyungjin Jeon, Incheon (KR)
Assigned to Samsung Display Co., Ltd., Yongin-si (KR)
Filed by Samsung Display Co., Ltd., Yongin-si (KR)
Filed on May 12, 2021, as Appl. No. 17/318,350.
Claims priority of application No. 10-2020-0116144 (KR), filed on Sep. 10, 2020.
Prior Publication US 2022/0077267 A1, Mar. 10, 2022
Int. Cl. H10K 59/121 (2023.01); H10K 59/126 (2023.01); H10K 71/00 (2023.01); H10K 59/12 (2023.01); H10K 59/123 (2023.01)
CPC H10K 59/1216 (2023.02) [H10K 59/126 (2023.02); H10K 71/00 (2023.02); H10K 59/1201 (2023.02); H10K 59/123 (2023.02)] 11 Claims
OG exemplary drawing
 
1. A display device comprising:
a first transistor comprising a light blocking pattern on a substrate, an active pattern comprising a drain region and a source region on the light blocking pattern, and a gate electrode on the active pattern;
a second transistor for providing a data voltage to the first transistor in response to a gate signal;
a first electrode on the gate electrode, directly electrically connected to the light blocking pattern, and directly electrically connected to the drain region or the source region;
an emission layer on the first electrode;
a storage capacitor electrically connected to the gate electrode and the light blocking pattern, and comprising:
a first conductive pattern in a same layer as the light blocking pattern;
a second conductive pattern on the first conductive pattern and overlapping the first conductive pattern;
a third conductive pattern in a same layer as the gate electrode, overlapping the second conductive pattern, at a different layer than the first conductive pattern, and electrically connected to the first conductive pattern; and
a fourth conductive pattern on the third conductive pattern, overlapping the third conductive pattern, and electrically connected to the second conductive pattern; and
a semiconductor pattern in a same layer as the active pattern, and contacting the second conductive pattern, wherein the semiconductor pattern is not doped,
wherein the first electrode directly contacts the emission layer and the light blocking pattern, and directly contacts the drain region or the source region.