US 12,225,768 B2
Display panel and display apparatus
Zhijian Zhu, Beijing (CN); Longfei Fan, Beijing (CN); Pengcheng Lu, Beijing (CN); Xiaochuan Chen, Beijing (CN); and Qian Wu, Beijing (CN)
Assigned to BOE Technology Group., Co., Ltd., Beijing (CN)
Appl. No. 17/628,678
Filed by BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Feb. 20, 2021, PCT No. PCT/CN2021/076970
§ 371(c)(1), (2) Date Jan. 20, 2022,
PCT Pub. No. WO2022/174404, PCT Pub. Date Aug. 25, 2022.
Prior Publication US 2022/0344425 A1, Oct. 27, 2022
Int. Cl. H01L 27/32 (2006.01); H10K 59/121 (2023.01); H10K 59/131 (2023.01)
CPC H10K 59/1213 (2023.02) [H10K 59/1216 (2023.02); H10K 59/131 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A display panel, comprising a base substrate and a sub-pixel on the base substrate, wherein the sub-pixel comprises a pixel circuit and a light-emitting element, and the pixel circuit comprises a data writing sub-circuit, a storage sub-circuit, a driver sub-circuit and a first sub-circuit, wherein
the data writing sub-circuit is configured to transmit a data signal to a first terminal of the storage sub-circuit in response to a control signal,
the driver sub-circuit comprises a control electrode, a first electrode and a second electrode, wherein the control electrode of the driver sub-circuit is coupled to the storage sub-circuit, the first electrode of the driver sub-circuit is configured to receive a first power supply voltage, the second electrode is coupled to a first electrode of the light-emitting element, and the driver sub-circuit is configured to drive the light-emitting element to emit light in response to a voltage of the control electrode, and
the first sub-circuit comprises a first transistor, wherein a gate of the first transistor and a first electrode of the first transistor are both coupled to the same electrode of the driver sub-circuit; and
wherein the first transistor is a noise reduction transistor, and
the driver circuit further comprises a bias transistor, the noise reduction transistor and the bias transistor are connected in series, and each of the noise reduction transistor and the bias transistor comprises a gate, a first electrode and a second electrode, wherein a gate of the noise reduction transistor and a first electrode of the noise reduction transistor are both coupled to the second electrode of the driver sub-circuit, a second electrode of the noise reduction transistor is coupled to a first electrode of the bias transistor, and a gate of the bias transistor is configured to receive a bias voltage, and a second electrode of the bias transistor is configured to receive a predetermined voltage.