US 12,225,734 B2
Semiconductor MRAM device and method
Shy-Jay Lin, Jhudong Township (TW); Mingyuan Song, Hsinchu (TW); and Hiroki Noguchi, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jul. 26, 2022, as Appl. No. 17/815,000.
Application 17/815,000 is a division of application No. 16/668,576, filed on Oct. 30, 2019, granted, now 11,430,832.
Prior Publication US 2022/0359613 A1, Nov. 10, 2022
Int. Cl. H10B 61/00 (2023.01); H01L 29/78 (2006.01); H10N 50/01 (2023.01); H10N 50/80 (2023.01)
CPC H10B 61/22 (2023.02) [H01L 29/7851 (2013.01); H10N 50/01 (2023.02); H10N 50/80 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
depositing a first dielectric layer over a semiconductor substrate;
depositing a first electrode layer over the first dielectric layer;
etching the first electrode layer to form a first electrode and a second electrode laterally separated from the first electrode;
depositing a Spin Orbit Torque (SOT) material on and physically contacting the first electrode and the second electrode;
depositing a plurality of Magnetic Tunnel Junction (MTJ) layers on the SOT material;
depositing a second electrode layer on the plurality of MTJ layers;
after depositing the second electrode layer, etching the SOT material to form a SOT layer extending from the first electrode to the second electrode;
etching the plurality of MTJ layers to form an MTJ stack on the SOT layer; and
etching the second electrode layer to form a top electrode on the MTJ stack.