| CPC H10B 53/40 (2023.02) [H01L 28/60 (2013.01); H10B 53/30 (2023.02)] | 20 Claims |

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1. A method of forming a semiconductor device, the method comprising:
forming a first dielectric layer over a substrate, the first dielectric layer extending from a first device region of the semiconductor device to a second device region of the semiconductor device;
forming a memory cell of a memory device over the substrate in the first device region, wherein forming the memory cell comprises forming a first ferroelectric structure in the first dielectric layer, wherein forming the first ferroelectric structure comprises forming a first bottom electrode, a first ferroelectric layer, and a first top electrode successively over the substrate, wherein the first bottom electrode and the first top electrode are formed to have a same width such that sidewalls of the first bottom electrode are aligned with respective sidewalls of the first top electrode; and
forming a tunable capacitor of a radio frequency (RF) circuit over the substrate in the second device region, wherein forming the tunable capacitor comprises forming a second ferroelectric structure in the first dielectric layer, wherein forming the second ferroelectric structure comprises forming a second bottom electrode, a second ferroelectric layer, and a second top electrode successively over the substrate, wherein the second bottom electrode is formed to be wider than the second top electrode such that the second bottom electrode extends beyond lateral extents of the second top electrode.
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