| CPC H10B 12/50 (2023.02) [G11C 8/14 (2013.01); H10B 12/30 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02)] | 17 Claims |

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1. A semiconductor structure, comprising:
a substrate;
a laminate structure arranged on the substrate, wherein the laminate structure comprises a plurality of first semiconductor layers spaced apart from each other in a direction perpendicular to a top surface of the substrate, wherein each of the plurality of first semiconductor layers comprises a plurality of channel areas spaced apart from each other in a first direction, and a plurality of first doped areas and a plurality of second doped areas, each of the plurality of first doped areas being arranged on one side of a respective one of the plurality of channel areas in a second direction, and each of the plurality of second doped areas being arranged on another side of the respective one of the plurality of channel areas in the second direction, and wherein each of the first direction and the second direction is a direction parallel to the top surface of the substrate, and the first direction intersects with the second direction; and
a word line structure, wherein the word line structure comprises a plurality of word lines extending in the first direction, and an edge of each of the plurality of word lines is flush with an edge of a respective one of the plurality of channel areas in the second direction;
wherein a distance between any two channel areas of the plurality of channel areas which are arranged adjacent to each other in the first direction is less than a distance between any two channel areas of the plurality of channel areas which are arranged adjacent to each other in the direction perpendicular to the top surface of the substrate.
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