US 12,225,714 B2
Semiconductor structure and manufacturing method thereof
Jingwen Lu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Apr. 28, 2022, as Appl. No. 17/661,065.
Claims priority of application No. 202110931844.8 (CN), filed on Aug. 13, 2021.
Prior Publication US 2023/0048610 A1, Feb. 16, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/34 (2023.02) [H10B 12/053 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate, comprising active regions arranged at intervals and an isolation structure located between the active regions;
a word line trench, penetrating through the active region and the isolation structure along a first direction;
a word line, located in the word line trench, wherein a top surface of the isolation structure exposed by the word line is lower than a top surface of the active region exposed by the word line, and
a protective layer, located on a top surface of the word line and on the top surface of the isolation structures exposed by the word line;
wherein on a section parallel to a second direction, a first height difference is formed between the active region and the isolation structure; and the second direction is parallel to the substrate and perpendicular to the first direction.