US 12,225,708 B2
Semiconductor device, method of manufacturing semiconductor device and electronic device
Jingwen Lu, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Feb. 16, 2022, as Appl. No. 17/651,279.
Application 17/651,279 is a continuation of application No. PCT/CN2021/113595, filed on Aug. 19, 2021.
Claims priority of application No. 202110934847.7 (CN), filed on Aug. 16, 2021.
Prior Publication US 2023/0046960 A1, Feb. 16, 2023
Int. Cl. H10B 12/00 (2023.01)
CPC H10B 12/053 (2023.02) [H10B 12/34 (2023.02)] 14 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, comprising:
forming multiple word line trenches on a semiconductor substrate, wherein the word line trenches extend in a first direction;
forming a word line structure in each of the word line trenches, wherein a top surface of the word line structure is flush with a top surface of the semiconductor substrate, wherein the word line structure comprises a gate dielectric layer, a buried word line and an insulating layer on the buried word line, wherein a top surface of the insulating layer is flush with the top surface of the semiconductor substrate;
forming multiple active region mask structures on the top surface of the semiconductor substrate, wherein the active region mask structures define active regions in the semiconductor substrate; and orthographic projection of the active region mask structures on a bottom surface of the semiconductor substrate extends in a second direction and passes through orthographic projection of the word line structures on the bottom surface of the semiconductor substrate; and
etching the word line structures and the semiconductor substrate by using the active region mask structures as an etch mask to form the active regions and buried word lines passing through the active regions;
wherein the etching the word line structures and the semiconductor substrate to form the active regions and buried word lines passing through the active regions comprises: etching, in an unmasked region, the semiconductor substrate, the insulating layer and the gate dielectric layer, exposing the buried word line in the unmasked region, such that in the unmasked region, the top surface of the semiconductor substrate is flush with a bottom surface of the buried word line, wherein the unmasked region is a region other than a region where the active region mask structure is located; and etching the semiconductor substrate in the unmasked region by a set depth, such that there is the set depth between the top surface of the semiconductor substrate and the bottom surface of the buried word line, in the unmasked region.