US 12,225,703 B2
Methods of manufacturing a semiconductor device using a mask
Mingyu Kim, Suwon-si (KR); Munhyeon Kim, Hwaseong-si (KR); and Daewon Ha, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Oct. 2, 2023, as Appl. No. 18/479,323.
Application 18/479,323 is a continuation of application No. 17/363,748, filed on Jun. 30, 2021, granted, now 11,832,430.
Claims priority of application No. 10-2020-0135324 (KR), filed on Oct. 19, 2020.
Prior Publication US 2024/0032269 A1, Jan. 25, 2024
Int. Cl. H10B 10/00 (2023.01); G11C 11/412 (2006.01); H01L 29/10 (2006.01)
CPC H10B 10/12 (2023.02) [G11C 11/412 (2013.01); H01L 29/1033 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method of manufacturing a semiconductor device, the method comprising:
forming a first sacrificial layer and a first active layer on a substrate;
forming a first mask pattern on a portion of the substrate;
etching the first sacrificial layer and the first active layer partially using the first mask pattern as a mask to expose a portion of a top surface of the substrate;
forming a semiconductor layer on the exposed portion of the top surface of the substrate;
forming sacrificial layers and active layers on the first active layer and the semiconductor layer, the active layers including an uppermost second active layer;
forming a second mask pattern on a portion of the uppermost second active layer;
forming a trench using the second mask pattern as an etch mask, the trench defining a first active pattern and a second active pattern; and
removing the sacrificial layers to form a first channel pattern and a second channel pattern on the first active pattern and the second active pattern, respectively,
wherein the first active pattern includes the semiconductor layer.