US 12,225,624 B2
Electronic device
Yannick Degot, Pourcieux (FR)
Assigned to STMicroelectronics (Rousset) SAS, Rousset (FR)
Filed by STMicroelectronics (Rousset) SAS, Rousset (FR)
Filed on Dec. 10, 2021, as Appl. No. 17/548,171.
Claims priority of application No. 2013185 (FR), filed on Dec. 14, 2020.
Prior Publication US 2022/0191680 A1, Jun. 16, 2022
Int. Cl. H04W 8/18 (2009.01); H03K 19/00 (2006.01); H04W 8/20 (2009.01); H04W 8/22 (2009.01); H04W 12/30 (2021.01)
CPC H04W 8/183 (2013.01) [H03K 19/0016 (2013.01); H04W 8/205 (2013.01); H04W 8/22 (2013.01); H04W 12/35 (2021.01)] 25 Claims
OG exemplary drawing
 
1. A wireless electronic device, comprising:
a modulator-demodulator circuit including a data transmit-receive terminal, a select terminal and a reset terminal;
wherein the modulator-demodulator circuit is configured to generate a select signal at the select terminal and a reset signal at the reset terminal, said reset signal for controlling reset of a first integrated circuit and activation/deactivation of at least one second integrated circuit;
wherein the first integrated circuit is configured to implement a first subscriber identity module (SIM) and including a data transmit-receive terminal, a select terminal and a reset terminal which are directly connected to the data transmit-receive terminal, select terminal and reset terminal, respectively, of the modulator-demodulator circuit and further including an input/output terminal;
wherein the first integrated circuit is activated for communication with the modulator-demodulator in response to a first logic state of the select signal and deactivated for communication with the modulator-demodulator in response to a second logic state of the select signal; and
wherein the at least one second integrated circuit is configured to implement a second subscriber identity module (SIM) and including a data transmit-receive terminal and a reset terminal, wherein the data transmit-receive terminal is directly connected to the data transmit-receive terminals of the modulator-demodulator circuit and the first integrated circuit, and wherein the reset terminal is directly connected to the input/output terminal of the first integrated circuit;
wherein the first integrated circuit is further configured, when deactivated for communication with the modulator-demodulator, to copy the reset signal received from the modulator-demodulator for output at the input/output terminal; and
wherein the second integrated circuit is activated for communication with the modulator-demodulator in response to a first logic state of the reset signal and deactivated for communication with the modulator-demodulator in response to a second logic state of the reset signal.