US 12,225,468 B2
Power saving techniques for layer-to-layer interface
Tianan Tim Ma, San Diego, CA (US); Su-Lin Low, San Diego, CA (US); Hausting Hong, San Diego, CA (US); Chun-I Lee, San Diego, CA (US); Jianzhou Li, San Diego, CA (US); Hong Kui Yang, San Diego, CA (US); Xiaoshu Qian, San Diego, CA (US); Jian Gu, San Diego, CA (US); and Chenxi Wang, San Diego, CA (US)
Assigned to GREATER SHINE LIMITED, New Taipei (TW)
Filed by GREATER SHINE LIMITED, New Taipei (TW)
Filed on Dec. 9, 2022, as Appl. No. 18/064,231.
Application 18/064,231 is a continuation of application No. PCT/US2021/025729, filed on Apr. 5, 2021.
Claims priority of provisional application 63/038,665, filed on Jun. 12, 2020.
Prior Publication US 2023/0105094 A1, Apr. 6, 2023
Int. Cl. H04L 1/20 (2006.01); H04L 69/24 (2022.01); H04W 52/02 (2009.01)
CPC H04W 52/0238 (2013.01) [H04L 1/203 (2013.01); H04L 69/24 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A method comprising:
receiving, at a first layer of a protocol stack, a plurality of code blocks from a base station, wherein the plurality of code blocks is a portion of a transport block and is associated with an error rate;
transmitting, to a second layer of the protocol stack, the plurality of code blocks; and
determining, at the second layer and based on the error rate, whether to (1) store the plurality of code blocks in memory or (2) process the plurality of code blocks,
wherein the error rate is above a threshold value, the method further comprising:
storing, at the second layer, the plurality of code blocks in memory.