US 12,225,102 B2
Synchronization circuit, semiconductor memory device, and synchronization method for synchronizing with small circuit scale
Taihei Shido, Yokohama (JP)
Assigned to WINDBOND ELECTRONICS CORP., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on Sep. 27, 2022, as Appl. No. 17/953,445.
Claims priority of application No. 2021-165180 (JP), filed on Oct. 7, 2021.
Prior Publication US 2023/0114844 A1, Apr. 13, 2023
Int. Cl. H04L 7/00 (2006.01)
CPC H04L 7/0041 (2013.01) [H04L 7/0037 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A synchronization circuit comprising:
a first delay circuit, delaying an input synchronization signal by a first predetermined time to generate a first delay synchronization signal;
a second delay circuit, delaying the first delay synchronization signal by a second predetermined time to generate a second delay synchronization signal;
a first synchronization circuit, outputting a first output data, wherein the first output data is generated by synchronizing an input data with the input synchronization signal;
a second synchronization circuit, outputting a second output data, wherein the second output data is generated by synchronizing the input data with the first delay synchronization signal; and
a resynchronization circuit, resynchronizing the input data with the second delay synchronization signal to update the first output data of the first synchronization circuit when the first output data is inconsistent with the second output data.