| CPC H04L 5/0051 (2013.01) [H04W 4/40 (2018.02)] | 13 Claims | 

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               1. An integrated circuit, comprising: 
            reception circuitry, which, in operation, controls receiving first reference signals used for a physical sidelink control channel (PSCCH) and second reference signals used for a physical sidelink shared channel (PSSCH); and 
                demodulation circuitry, which, in operation, controls a demodulating process based on the first and second reference signals within a slot, 
                wherein the first reference signals are mapped to a first resource, and the second reference signals are mapped to a second resource which is different from the first resource, 
                wherein a first time interval between the first reference signals is shorter than a second time interval between the second reference signals. 
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