US 12,224,953 B2
Wide elastic buffer
Naresh Sharma, Uttar Pradesh (IN); and Mohan Vedam, Karantaka (IN)
Assigned to Achronix Semiconductor Corporation, Santa Clara, CA (US)
Filed by Achronix Semiconductor Corporation, Santa Clara, CA (US)
Filed on Mar. 30, 2023, as Appl. No. 18/128,901.
Application 18/128,901 is a continuation of application No. 16/877,695, filed on May 19, 2020, granted, now 11,689,478.
Prior Publication US 2023/0239256 A1, Jul. 27, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H04L 49/90 (2022.01); H04J 3/06 (2006.01); H04L 49/9047 (2022.01)
CPC H04L 49/9052 (2013.01) [H04J 3/0632 (2013.01); G06F 2213/0026 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a data buffer circuit that is configured to buffer data in a data buffer that comprises a plurality of columns; and
a lane shifter circuit coupled to the data buffer circuit and configured to perform operations comprising:
accessing a plurality of data elements comprising two data elements from each column of the plurality of columns; and
based on detecting a skip ordered set in the accessed plurality of data elements, the skip ordered set comprising fewer symbols than a number of columns in the plurality of columns, generating an output that comprises a number of output data elements equal to the number of columns, two of the output data elements having been accessed from a single column of the plurality of columns.