US 12,224,808 B2
Automatic optimization method of performance parameters of a signal generator circuit
Ajan Joshi, Munich (DE); Florian Fischbacher, Munich (DE); Haisang Yu, Munich (DE); Chlodwig Neuhaeusler, Munich (DE); and Michael Koenig, Munich (DE)
Assigned to Rohde & Schwarz GmbH & Co. KG, Munich (DE)
Filed by Rohde & Schwarz GmbH & Co. KG, Munich (DE)
Filed on Dec. 9, 2022, as Appl. No. 18/064,077.
Prior Publication US 2024/0195515 A1, Jun. 13, 2024
Int. Cl. H04B 17/00 (2015.01); H04L 25/03 (2006.01); H04L 27/20 (2006.01)
CPC H04B 17/0085 (2013.01) [H04L 25/03 (2013.01); H04L 27/20 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An optimization method of automatically optimizing a performance parameter of a signal generator circuit, the signal generator circuit comprising a digital signal generator circuit, a digital compensation circuit, at least one digital-to-analog converter (DAC), an in-phase and quadrature (IQ) modulation circuit, a radio-frequency (RF) circuit, and a control circuit, the optimization method comprising:
generating, by the digital signal generator circuit, a digital baseband signal;
filtering, by the digital compensation circuit, the digital baseband signal, thereby obtaining a filtered baseband signal;
converting, by the at least one DAC, the filtered baseband signal into an analog baseband signal;
modulating, by the IQ modulation circuit, the analog baseband signal, thereby obtaining a modulated RF signal,
processing, by the RF circuit, the modulated RF signal, thereby obtaining an RF output signal,
determining, by the control circuit, a performance parameter of the signal generator circuit based on the RF output signal, and
automatically adapting, by the control circuit, at least one operational parameter of the signal generator circuit in order to optimize the performance parameter;
wherein the at least one operational parameter comprises a power level of the digital baseband signal, a baseband frequency offset of the digital baseband signal, a filter headroom of the digital compensation circuit, a frequency response of the digital compensation circuit, an operating point of the at least one DAC, an IQ offset of the IQ modulation circuit, a gain of the IQ modulation circuit, a quadrature value of the IQ modulation circuit, and/or an RF frequency offset of the RF circuit;
wherein the performance parameter is an error vector magnitude (EVM) or an adjacent channel leakage ratio (ACLR), and
wherein the operating point of the at least one DAC is raised if the performance parameter is an EVM and/or wherein the operating point of the at least one DAC is lowered if the performance parameter is an ACLR.