| CPC H04B 10/516 (2013.01) | 8 Claims |
|
1. A transmission code processing device comprising:
signal point arrangement shaping encoding circuitry to perform signal point arrangement shaping encoding on a communication target bit input from an outside, and convert the communication target bit into a shaped bit of mi (mi is an integer equal to or more than one) column;
systematic error correction encoding circuitry to perform systematic error correction encoding by using, as an information bit, the shaped bit obtained by conversion performed by the signal point arrangement shaping encoding circuitry, and generate a parity bit of mp (mp is an integer equal to or more than one) column based on the shaped bit;
first symbol mapping circuitry to convert the shaped bit obtained by conversion performed by the signal point arrangement shaping encoding circuitry into a first modulation symbol;
second symbol mapping circuitry to convert the parity bit generated by the systematic error correction encoding circuitry into a second modulation symbol; and
symbol multiplexing circuitry to generate a third modulation symbol by multiplexing the first modulation symbol obtained by conversion performed by the first symbol mapping circuitry and the second modulation symbol obtained by conversion performed by the second symbol mapping circuitry,
wherein the first modulation symbol has one signal point element in a first signal point set including ci (ci is an integer equal to or more than one) signal point including an origin,
the second modulation symbol has one signal point element in a second signal point set including cp (cp is an integer equal to or more than one) signal point not including the origin, and
the signal point arrangement shaping encoding circuitry performs signal point arrangement shaping in which the first modulation symbol has one signal point element included in the first signal point set.
|