US 12,224,784 B2
Signal adjusting circuit and receiving end circuit using the same
Sie-Siou Jhang-Jian, Hsinchu (TW); Hsuan-Yi Su, Hsinchu (TW); and Chih-Lung Chen, Hsinchu (TW)
Assigned to REALTEK SEMICONDUCTOR CORP., Hsinchu (TW)
Filed by REALTEK SEMICONDUCTOR CORP., Hsinchu (TW)
Filed on Jul. 22, 2022, as Appl. No. 17/870,939.
Claims priority of application No. 110138810 (TW), filed on Oct. 20, 2021.
Prior Publication US 2023/0117775 A1, Apr. 20, 2023
Int. Cl. H04B 1/10 (2006.01); H03G 3/30 (2006.01); H04B 1/12 (2006.01); H04B 1/16 (2006.01)
CPC H04B 1/1027 (2013.01) [H03G 3/3036 (2013.01); H04B 1/123 (2013.01); H04B 1/1607 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A signal adjusting circuit adapted to a peak detector, the signal adjusting circuit comprising:
a first amplifier including a first input terminal and a first output terminal, wherein the first input terminal receives a first input signal, and the first amplifier is configured to amplify the first input signal and output a first output signal from the first output terminal; and
a first feedback circuit, including:
a first capacitor connected between the first input terminal and the first output terminal;
a first resistor connected between the first input terminal and a first output node; and
a second resistor connected between the first output node and the first output terminal, wherein the first feedback circuit is configured to determine a first gain of the first output signal;
wherein the peak detector is connected to the first output node, so as to receive a first detection signal and detect a peak value of the first detection signal;
wherein the peak detector has a predetermined power input range, and the first resistance and the second resistance have a first predetermined ratio, such that the first detection signal has a second gain relative to the first input signal and is within the predetermined power input range.