CPC H03M 13/2732 (2013.01) [H03M 13/23 (2013.01); H03M 13/2792 (2013.01); H04L 1/0045 (2013.01); H03M 13/2782 (2013.01); H03M 13/2789 (2013.01); H03M 13/6508 (2013.01)] | 20 Claims |
1. A receiver, comprising:
circuitry configured to
receive a frame including a sequence of symbols, mapped on a Quadrature Amplitude Modulation (QAM) constellation, and interleaved in accordance with a convolutional interleaving, the received sequence of symbols being divided into blocks of forward error-correction encoded data,
receive signaling data including a number of symbols indicating a start position of a block of forward error-correction encoded data that results after the convolutional interleaving has been performed for the frame, the received signaling data being applied to the frame,
deinterleave the received sequence of symbols into an output sequence, in accordance with a plurality n of delay lines, a k-th delay line having k delay elements with k varying from 0 to n−1, and
decode the output sequence in accordance with the signaled number of symbols indicating the start position of the block of forward error-correction encoded data that results after the convolutional interleaving has been performed for the frame.
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