| CPC H03K 3/356017 (2013.01) [H01L 21/823871 (2013.01); H01L 23/528 (2013.01); H01L 27/092 (2013.01)] | 20 Claims |
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1. A manufacturing method of an input circuit of a flip-flop, comprising:
depositing a first gate strip, a second gate strip, a third gate strip, and a fourth gate strip;
executing a cut-off operation upon the first gate strip to generate a first first gate strip and a second first gate strip, wherein the first first gate strip is a gate terminal of a first PMOS, and the second first gate strip is a gate terminal of a first NMOS;
executing a cut-off operation upon the third gate strip to generate a first third gate strip and a second third gate strip, wherein the first third gate strip is a gate terminal of a second PMOS and the second third gate strip is a gate terminal of a second NMOS; and
directing a first signal to the first first gate strip and the second third gate strip, and a second signal to the second first gate strip and the first third gate strip;
forming a first conductive strip connected between the first first gate strip and the second third gate; and
forming a second conductive strip connected between the second first gate strip and the first third gate.
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