US 12,224,746 B2
Impedance calibration circuit
Yanian Shao, Hefei (CN); and Zhiqiang Zhang, Hefei (CN)
Assigned to CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed by CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei (CN)
Filed on Jan. 14, 2023, as Appl. No. 18/154,798.
Application 18/154,798 is a continuation of application No. PCT/CN2022/112658, filed on Aug. 16, 2022.
Claims priority of application No. 202210893495.X (CN), filed on Jul. 27, 2022.
Prior Publication US 2024/0039535 A1, Feb. 1, 2024
Int. Cl. H03K 19/00 (2006.01); G11C 7/10 (2006.01)
CPC H03K 19/0005 (2013.01) [G11C 7/1048 (2013.01); G11C 2207/2254 (2013.01)] 14 Claims
OG exemplary drawing
 
1. An impedance calibration circuit, comprising:
a calibration circuit configured to receive a first calibration clock signal, to perform impedance calibration on a basis of the first calibration clock signal, and to output a first stop signal when the calibration is completed;
a first detection circuit configured to detect calibration time of the impedance calibration circuit, and to output a second stop signal when the calibration time reaches a preset value; and
a calibration control circuit configured to receive the first stop signal and the second stop signal and to output the first calibration clock signal, wherein when the first stop signal or the second stop signal is received, the calibration control circuit stops outputting the first calibration clock signal; and
wherein the calibration circuit comprises a first calibration subcircuit, the calibration circuit being configured to perform impedance calibration on the first calibration subcircuit when the first calibration clock signal is received; and the first calibration subcircuit comprises:
a first resistor element having a first terminal connected to a first power terminal;
a reference resistor having a first terminal connected to a second terminal of the first resistor element and a second terminal connected to a second power terminal;
a first comparison subcircuit configured to compare a second terminal voltage of the first resistor element with a first reference voltage, and to output a first comparison signal; and
a first detection subcircuit configured to determine the first comparison signal as an input signal, to record change of the first comparison signal, and to output the first stop signal when the change of the first comparison signal meets a preset condition.