US 12,224,729 B1
Fractional delay filter for a digital signal processing system
Dennis L. Stanley, Kansas City, MO (US); and Audrey L. Chritton, Kansas City, MO (US)
Assigned to Honeywell Federal Manufacturing & Technologies, LLC, Kansas City, MO (US)
Filed by Honeywell Federal Manufacturing & Technologies, LLC, Kansas City, MO (US)
Filed on Jul. 27, 2021, as Appl. No. 17/386,165.
Application 17/386,165 is a continuation of application No. 16/985,884, filed on Aug. 5, 2020, granted, now 11,115,004.
This patent is subject to a terminal disclaimer.
Int. Cl. H03H 17/00 (2006.01); H03H 17/02 (2006.01); H04L 7/00 (2006.01)
CPC H03H 17/0018 (2013.01) [H03H 17/028 (2013.01); H04L 7/0029 (2013.01); H03H 2017/0081 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A processing element for implementation in a digital signal processing system, the processing element configured to:
simultaneously receive a plurality of time-ordered digital values from a plurality of parallel data streams;
store one or more of the digital values; and
simultaneously weight each of the digital values substantially consistent with a Farrow structured fractional delay filter using the plurality of digital values and one or more previously stored values to produce a plurality of filtered time-ordered digital values.