US 12,224,676 B2
Flyback converter providing accurate synchronous rectification and method of controlling the same
Yi-Lun Shen, Taipei (TW); and Yu-Yun Huang, Taipei (TW)
Assigned to ARK MICROELECTRONIC CORP. LTD., Guangdong (CN)
Filed by Ark Semiconductor Corp. Ltd., Shenzhen (CN)
Filed on Dec. 28, 2022, as Appl. No. 18/089,598.
Claims priority of application No. 202111659041.8 (CN), filed on Dec. 30, 2021.
Prior Publication US 2023/0216421 A1, Jul. 6, 2023
Int. Cl. H02M 3/335 (2006.01); H02M 1/00 (2006.01)
CPC H02M 3/33592 (2013.01) [H02M 1/0009 (2021.05); H02M 3/33515 (2013.01)] 16 Claims
OG exemplary drawing
 
1. A method of controlling synchronous rectification for a flyback converter, the flyback converter comprising a transformer, a main switch, a synchronous rectifier switch and a synchronous rectifier controller, the transformer comprising a primary winding and a secondary winding, the primary winding being coupled to the main switch, the synchronous rectifier switch comprising a first terminal coupled to the secondary winding and the synchronous rectifier controller, a second terminal coupled to a power output port and the synchronous rectifier controller, and a control terminal coupled to the synchronous rectifier controller, the synchronous rectifier switch being configured to receive a control voltage from the synchronous rectifier controller to vary an impedance between the first terminal and the second terminal of the synchronous rectifier switch, a voltage difference signal being generated according to a voltage difference between the first terminal and the second terminal of the synchronous rectifier switch, the synchronous rectifier controller comprising an edge detection circuit, a blanking time circuit and an output circuit, the edge detection circuit comprises a filter and a third comparator, the method comprising:
the filter filtering the voltage difference signal to generate a filtered voltage difference signal;
the third comparator comparing the voltage difference signal with a threshold level to generate a fast falling edge signal;
the blanking time circuit detecting a peak according to the voltage difference signal to generate an envelope signal;
the blanking time circuit generating a time length control signal according to the voltage difference signal and the envelope signal;
the blanking time circuit generating a blanking time signal according to the voltage difference signal and the time length control signal; and
the output circuit performing a logic operation according to the blanking time signal and the fast falling edge signal to generate an output signal, so as to generate the control voltage.