| CPC H02M 1/0006 (2021.05) [H03K 19/0175 (2013.01); H02M 1/08 (2013.01)] | 10 Claims |

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1. A pulse receiving circuit comprising:
a first pulse detector arranged to receive a differential input between a first reception pulse signal at a secondary winding of a first transformer and a second reception pulse signal at a secondary winding of a second transformer;
a second pulse detector arranged to receive the differential input between the first reception pulse signal and the second reception pulse signal with input polarity reversed to that of the first pulse detector;
a logic unit arranged to generate a reception pulse signal based on output signals of the first pulse detector and the second pulse detector;
a first switch and a second switch connected between both ends of the secondary windings of the first transformer and the second transformer, respectively; and
a timer to turn on the first switch and the second switch for a predetermined masking period from pulse detection timings of the first pulse detector and the second pulse detector, respectively.
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