US 12,224,579 B2
ESD protection device
Hans-Martin Ritter, Nijmegen (NL); Steffen Holland, Nijmegen (NL); and Markus Mergens, Nijmegen (NL)
Assigned to Nexperia BV, Nijmegen (NL)
Filed by NEXPERIA B.V., Nijmegen (NL)
Filed on Jan. 12, 2023, as Appl. No. 18/153,726.
Claims priority of application No. 22151122 (EP), filed on Jan. 12, 2022.
Prior Publication US 2023/0223750 A1, Jul. 13, 2023
Int. Cl. H02H 9/04 (2006.01); H01L 23/00 (2006.01); H01L 23/495 (2006.01); H01L 25/16 (2023.01); H01L 25/18 (2023.01)
CPC H02H 9/046 (2013.01) [H01L 23/49575 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 25/162 (2013.01); H01L 25/18 (2013.01); H01L 24/06 (2013.01); H01L 2224/0603 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48245 (2013.01); H01L 2224/49112 (2013.01); H01L 2924/13034 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An electrostatic discharge (ESD), protection device, comprising:
a node terminal configured to be connected to a node of a circuit to be protected;
a reference terminal configured to be connected to a reference voltage, wherein the reference voltage is ground; and
a series connection of a first unit and a second unit arranged in between the node terminal and the reference terminal;
wherein the ESD protection device is configured to provide a conductive path between the node terminal and the reference terminal and through the series connection in case of an ESD event occurring on the node to be protected;
wherein for a first current flow from one of the node terminals and the reference terminal to the other of the node terminal and the reference terminal:
the first unit has I-V characteristics that display a first snapback that is described by a first trigger voltage and a first holding voltage;
the second unit comprises a junction that is reverse biased for the first current flow, the reverse biased junction having I-V characteristics that are described by a second trigger voltage, and if these I-V characteristics display a second snapback, also by a second holding voltage;
wherein the first unit has a first series capacitance and the second unit a second series capacitance, wherein the second series capacitance is at least 3 times greater than the first series capacitance; and
wherein the second trigger voltage, or the second holding voltage if the I-V characteristics of the second unit display the second snapback, has a magnitude that is at least 3 times greater than a magnitude of the first holding voltage.