US 12,224,481 B2
Semiconductor device package and method of manufacturing the same
Cheng-Lin Ho, Kaohsiung (TW); Chih-Cheng Lee, Kaohsiung (TW); Chun Chen Chen, Kaohsiung (TW); and Yuanhao Yu, Kaohsiung (TW)
Assigned to ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung (TW)
Filed by Advanced Semiconductor Engineering, Inc., Kaohsiung (TW)
Filed on Mar. 7, 2023, as Appl. No. 18/118,738.
Application 18/118,738 is a continuation of application No. 16/506,654, filed on Jul. 9, 2019, granted, now 11,600,901.
Prior Publication US 2023/0223676 A1, Jul. 13, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01Q 1/22 (2006.01); H01L 23/31 (2006.01); H01L 23/66 (2006.01); H01Q 1/40 (2006.01); H01Q 21/00 (2006.01); H01Q 21/06 (2006.01)
CPC H01Q 1/2283 (2013.01) [H01L 23/66 (2013.01); H01Q 1/40 (2013.01); H01Q 21/0093 (2013.01); H01L 23/3128 (2013.01); H01L 2223/6677 (2013.01); H01Q 21/061 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device package, comprising:
a substrate; and
an antenna module disposed over the substrate, the antenna module comprising:
a supporting element;
an antenna pattern disposed over the supporting element;
a pad;
a conductive pillar penetrating the supporting element and electrically connecting the antenna pattern to the pad;
a first dielectric layer disposed below the supporting element and having an opening; and
an electrical contact partially disposed within the opening of the first dielectric layer, and connecting the pad and the substrate,
wherein a lower surface of the pad is exposed from the opening of the first dielectric layer, and the pad directly contacts the conductive pillar and the electrical contact.