US 12,224,340 B2
Heterojunction semiconductor device with low on-resistance
Siyang Liu, Wuxi (CN); Chi Zhang, Wuxi (CN); Kui Xiao, Wuxi (CN); Guipeng Sun, Wuxi (CN); Dejin Wang, Wuxi (CN); Jiaxing Wei, Wuxi (CN); Li Lu, Wuxi (CN); Weifeng Sun, Wuxi (CN); and Shengli Lu, Wuxi (CN)
Assigned to SOUTHEAST UNIVERSITY, Nanjing (CN); and CSMC TECHNOLOGIES FAB2 CO., LTD., Wuxi (CN)
Appl. No. 17/417,663
Filed by SOUTHEAST UNIVERSITY, Nanjing (CN); and CSMC TECHNOLOGIES FAB2 CO., LTD., Wuxi (CN)
PCT Filed Dec. 19, 2019, PCT No. PCT/CN2019/126517
§ 371(c)(1), (2) Date Jun. 23, 2021,
PCT Pub. No. WO2020/135207, PCT Pub. Date Jul. 2, 2020.
Claims priority of application No. 201811585004.5 (CN), filed on Dec. 24, 2018.
Prior Publication US 2022/0069115 A1, Mar. 3, 2022
Int. Cl. H01L 29/778 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/207 (2006.01)
CPC H01L 29/7788 (2013.01) [H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/207 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A heterojunction semiconductor device with low on-resistance comprising:
a metal drain electrode, a substrate disposed on the metal drain electrode, a buffer layer disposed on the substrate, a current blocking layer disposed within the buffer layer, a gate structure disposed on the buffer layer and comprising a metal gate electrode, a metal source electrode disposed above the metal gate electrode, a first passivation layer disposed between the metal gate electrode and the metal source electrode, and a second passivation layer disposed between the metal gate electrode and the buffer layer;
wherein the current blocking layer comprises a first-level current blocking layer, a second-level current blocking layer, and a third-level current blocking layer which are sequentially arranged from top to bottom, the first-level current blocking layer is continuous as one whole piece and has only one inner opening when viewed in plan-view, the second-level current blocking layer is continuous as one whole piece and has only one inner opening when viewed in plan-view, and the third-level current blocking layer is continuous as one whole piece and has only one inner opening when viewed in plan-view, and symmetry centers of the first-level current blocking layer, the second-level current blocking layer, and the third-level current blocking layer are collinear;
the inner opening of the first-level current blocking layer is larger than the inner opening of the second-level current blocking layer, and the inner opening of the second-level current blocking layer is larger than the inner opening of the third-level current blocking layer, presenting a trend of becoming smaller level by level.