US 12,224,332 B2
Semiconductor device
Akihiro Hanada, Tokyo (JP); Takuo Kaitoh, Tokyo (JP); and Hajime Watakabe, Tokyo (JP)
Assigned to Japan Display Inc., Tokyo (JP)
Filed by Japan Display Inc., Tokyo (JP)
Filed on Mar. 30, 2022, as Appl. No. 17/657,168.
Application 17/657,168 is a continuation of application No. PCT/JP2020/035034, filed on Sep. 16, 2020.
Claims priority of application No. 2019-181794 (JP), filed on Oct. 2, 2019.
Prior Publication US 2022/0223707 A1, Jul. 14, 2022
Int. Cl. H01L 29/49 (2006.01); G02F 1/1368 (2006.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01)
CPC H01L 29/4908 (2013.01) [G02F 1/1368 (2013.01); H01L 27/1225 (2013.01); H01L 29/78621 (2013.01); H01L 29/7869 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A semiconductor device having a TFT, in which a gate insulating film is formed on a gate electrode, and an oxide semiconductor film is formed on the gate insulating film;
the oxide semiconductor film including a channel region, a drain region, and a source region,
wherein a metal nitride film is formed on a top surface of the gate electrode in an opposing portion to the channel region in a plan view,
the metal nitride film is not formed at a part of the top surface of the gate electrode,
the oxide semiconductor film comprises an intermediate resistance region between the channel region and the drain region and between the channel region and the source region of the oxide semiconductor film,
the metal nitride film is not formed at places of the top surface of the gate electrode corresponding to the intermediate resistance region, and
the metal nitride film is formed at places of the top surface of the gate electrode corresponding to the drain region and the source region of the oxide semiconductor film.