| CPC H01L 29/41725 (2013.01) [H01L 21/0228 (2013.01); H01L 21/28556 (2013.01); H01L 21/31111 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 29/401 (2013.01); H01L 29/66545 (2013.01); H01L 21/31144 (2013.01); H01L 21/32137 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823468 (2013.01)] | 20 Claims |

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1. A semiconductor device, comprising:
a substrate;
a gate structure over the substrate;
source/drain regions in the substrate and on opposite sides of the gate structure;
a source/drain contact over one of the source/drain regions;
a metal cap over the source/drain contact, wherein a bottom surface of the metal cap is higher than a top surface of the gate structure;
a contact plug over the metal cap; and
a first etch stop layer over the gate structure, wherein the first etch stop layer is in contact with the metal cap and the contact plug.
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