US 12,224,309 B2
Capacitors with built-in electric fields
Sou-Chi Chang, Portland, OR (US); Chia-Ching Lin, Portland, OR (US); Kaan Oguz, Portland, OR (US); I-Cheng Tung, Hillsboro, OR (US); Uygar E. Avci, Portland, OR (US); Matthew V. Metz, Portland, OR (US); Ashish Verma Penumatcha, Beaverton, OR (US); Ian A. Young, Portland, OR (US); and Arnab Sen Gupta, Beaverton, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 9, 2020, as Appl. No. 17/116,315.
Prior Publication US 2022/0181433 A1, Jun. 9, 2022
Int. Cl. H01L 23/522 (2006.01); H01L 49/02 (2006.01)
CPC H01L 28/60 (2013.01) [H01L 23/5223 (2013.01); H01L 28/65 (2013.01); H01L 28/75 (2013.01); H01L 28/55 (2013.01)] 17 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) die, comprising:
a capacitor, including:
a top electrode comprising a first top electrode region and a second top electrode region wherein the first top electrode region has a different material composition than the first top electrode region;
a bottom electrode; and
a dielectric region between and in contact with the first top electrode region and the bottom electrode;
wherein the dielectric region includes a perovskite material, the first top electrode region has a same material composition as the bottom electrode, and the first top electrode region has at least one of a different crystal phase from the bottom electrode and a different defect density from the bottom electrode.