US 12,224,292 B2
Array substrate, display panel, and manufacturing method of array substrate
Chen Dai, Guangdong (CN)
Assigned to SHENZHEN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD., Guangdong (CN)
Appl. No. 17/624,033
Filed by Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd., Guangdong (CN)
PCT Filed Dec. 27, 2021, PCT No. PCT/CN2021/141568
§ 371(c)(1), (2) Date Dec. 30, 2021,
PCT Pub. No. WO2023/108811, PCT Pub. Date Jun. 22, 2023.
Claims priority of application No. 202111554193.1 (CN), filed on Dec. 17, 2021.
Prior Publication US 2023/0197738 A1, Jun. 22, 2023
Int. Cl. H01L 27/12 (2006.01)
CPC H01L 27/1251 (2013.01) [H01L 27/1225 (2013.01); H01L 27/1262 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An array substrate, comprising:
a substrate; and
a thin film transistor layer disposed on the substrate;
wherein the thin film transistor layer comprises a first thin film transistor, and the first thin film transistor comprises a first active layer, a first gate insulating layer, and a first source and drain electrode layer disposed in a stack on the substrate;
the first gate insulating layer is disposed between the first active layer and the first source and drain electrode layer, and the first source and drain electrode layer comprises a first source electrode and a first drain electrode electrically connected to the first active layer; and
the first thin film transistor further comprises a first gate electrode disposed on the first gate insulating layer, and the first gate electrode and the first source and drain electrode layer are disposed on a same layer;
wherein the first thin film transistor further comprises a second gate electrode and an interlayer insulating layer, the second gate electrode is disposed on one side of the first active layer adjacent to the substrate, and the interlayer insulating layer is disposed between the first active layer and the second gate electrode.