US 12,224,285 B2
Integrated circuit and method of forming the same
Chin-Wei Hsu, Hsinchu (TW); Shun Li Chen, Hsinchu (TW); Ting Yu Chen, Hsinchu (TW); Hui-Zhong Zhuang, Hsinchu (TW); and Chih-Liang Chen, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on May 31, 2022, as Appl. No. 17/828,981.
Prior Publication US 2023/0387128 A1, Nov. 30, 2023
Int. Cl. H01L 27/118 (2006.01)
CPC H01L 27/11807 (2013.01) [H01L 2027/11875 (2013.01); H01L 2027/11881 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a set of active regions extending in a first direction, and being on a first level of a substrate;
a first contact extending in a second direction different from the first direction, being on a second level different from the first level, and overlapping at least a first active region of the set of active regions;
a set of gates extending in the second direction, overlapping the set of active regions, and being on a third level different from the first level;
a first conductive line extending in the first direction, and overlapping the first contact, and being on a fourth level different from the first level, the second level and the third level;
a second conductive line extending in the first direction, being on the fourth level, overlapping the first contact, and being separated from the first conductive line in the second direction;
a first via between the first contact and the first conductive line, the first via electrically coupling the first contact and the first conductive line together; and
a second via between the first contact and the second conductive line, the second via electrically coupling the first contact and the second conductive line together.