US 12,224,283 B2
Semiconductor memory device
Janbo Zhang, Quanzhou (CN); and Yu-Cheng Tung, Quanzhou (CN)
Assigned to Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou (CN)
Filed by Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou (CN)
Filed on Aug. 29, 2023, as Appl. No. 18/239,720.
Application 18/239,720 is a continuation of application No. 17/516,713, filed on Nov. 2, 2021, granted, now 11,784,184.
Claims priority of application No. 202110837426.2 (CN), filed on Jul. 23, 2021; and application No. 202121695927.3 (CN), filed on Jul. 23, 2021.
Prior Publication US 2023/0411387 A1, Dec. 21, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 27/088 (2006.01); H01L 29/06 (2006.01); H01L 29/78 (2006.01)
CPC H01L 27/088 (2013.01) [H01L 29/0649 (2013.01); H01L 29/7813 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor memory device, comprising;
a substrate;
an active structure disposed in the substrate, the active structure comprising a plurality of first active fragments and a plurality of second active fragments, each of the plurality of first active fragments and each of the plurality of second active fragments extending parallel to each other along a first direction, the plurality of second active fragments being disposed outside a periphery of all of the plurality of first active fragments, wherein a length of each of the plurality of first active fragments in the first direction is different from a length of each of the plurality of second active fragments in the first direction;
a shallow trench isolation, disposed in the substrate to surround the active structure; and
a plurality of word lines, disposed in the substrate, the plurality of word lines being parallel with each other to extend along a second direction, at least one of the plurality of word lines being only intersected with the plurality of second active fragments, and the second direction being not perpendicular to the first direction.