US 12,224,276 B2
3D semiconductor packages
Chen-Hua Yu, Hsinchu (TW); Chun-Hui Yu, Hsinchu County (TW); Kuo-Chung Yee, Taoyuan (TW); and Liang-Ju Yen, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jun. 10, 2022, as Appl. No. 17/837,039.
Application 17/837,039 is a continuation of application No. 16/888,874, filed on Jun. 1, 2020, granted, now 11,393,805.
Claims priority of provisional application 62/893,794, filed on Aug. 29, 2019.
Prior Publication US 2022/0302100 A1, Sep. 22, 2022
Int. Cl. H01L 25/18 (2023.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/538 (2006.01); H01L 25/00 (2006.01)
CPC H01L 25/18 (2013.01) [H01L 23/3135 (2013.01); H01L 23/367 (2013.01); H01L 23/5383 (2013.01); H01L 25/50 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor package, comprising:
a first die having a bottom surface, a top surface and a sidewall between the bottom surface and the top surface;
a silicon block having a bottom surface, a top surface and a sidewall between the bottom surface and the top surface;
a first encapsulant, disposed between the sidewall of the first die and the sidewall of the silicon block, wherein the top surface of the silicon block is coplanar with a top surface of the first encapsulant; and
an adhesive adhered to the bottom surface of the silicon block.