US 12,224,265 B2
Three-dimensional stacking structure and manufacturing method thereof
Ming-Fa Chen, Taichung (TW); Sung-Feng Yeh, Taipei (TW); Tzuan-Horng Liu, Taoyuan (TW); and Chao-Wen Shih, Hsinchu County (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Jul. 1, 2022, as Appl. No. 17/855,825.
Application 17/855,825 is a continuation of application No. 16/787,031, filed on Feb. 11, 2020, granted, now 11,417,629.
Prior Publication US 2022/0336414 A1, Oct. 20, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 25/065 (2023.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01)
CPC H01L 25/0652 (2013.01) [H01L 21/565 (2013.01); H01L 21/78 (2013.01); H01L 23/3128 (2013.01); H01L 23/481 (2013.01); H01L 24/08 (2013.01); H01L 24/89 (2013.01); H01L 24/94 (2013.01); H01L 25/50 (2013.01); H01L 2224/08146 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2225/06544 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06586 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A stacking structure, comprising:
a first die having through die vias penetrating through the first die, wherein the first through die vias and the first die have substantially a same thickness;
a second die, stacked on the first die and having second through die vias penetrating through the second die, wherein the first through die vias are bonded with the second through die vias, and the first through die vias have first critical dimensions different from second critical dimensions of the second through die vias; and
a third die disposed over the first die and on the second die, wherein the second die is located between the first die and the third die, the third die has conductive features embedded in a dielectric film and the conductive features of the third die are bonded with the second through die vias of the second die.