| CPC H01L 24/81 (2013.01) [H01L 23/5385 (2013.01); H01L 24/17 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 2224/16113 (2013.01); H01L 2224/16235 (2013.01)] | 20 Claims |

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1. A semiconductor device, comprising:
a die interconnect substrate, comprising:
a substrate structure comprising an electrically insulating substrate; and
a bridge die embedded in the electrically insulating substrate of the substrate structure, the bridge die comprising a silicon substrate, wherein a first portion of the electrically insulating substrate is on sidewalls of the bridge die and on a front side of the bridge die;
a core embedded in the electrically insulating substrate of the substrate structure, the core below the bridge die;
a lateral wire beneath the bridge die, the lateral wire extending an entirety of the bridge die, wherein a second portion of the electrically insulating substrate is beneath the lateral wire;
a first interface structure coupled to a first bridge die pad of the front side of the bridge die, the first interface structure through the first portion of the electrically insulating substrate;
a second interface structure coupled to a second bridge die pad of the front side of the bridge die, the second interface structure through the first portion of the electrically insulating substrate;
a first substrate interconnect through the first portion of the electrically insulating substrate; and
a second substrate interconnect through the first portion of the electrically insulating substrate; and
a first die coupled to the bridge die by the first interface structure, the first die also coupled to the first substrate interconnect, wherein the first die is coupled to the lateral wire; and
a second die coupled to the bridge die by the second interface structure, the second die also coupled to the second substrate interconnect.
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