US 12,224,248 B2
Semiconductor wafer and semiconductor dies formed therefrom including grooves along long edges of the semiconductor dies
Chin-Tien Chiu, Taichung (TW); Jia Li, Shanghai (CN); Dongpeng Xue, Shanghai (CN); Huirong Zhang, Shanghai (CN); Guocheng Zhong, Shanghai (CN); Xiaohui Wang, Shanghai (CN); and Hua Tan, Shanghai (CN)
Assigned to Sandisk Technologies, Inc., Milpitas, CA (US)
Filed by WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US)
Filed on Mar. 7, 2022, as Appl. No. 17/688,099.
Prior Publication US 2023/0282594 A1, Sep. 7, 2023
Int. Cl. H01L 23/544 (2006.01); H01L 25/065 (2023.01); H10B 41/20 (2023.01); H10B 43/20 (2023.01)
CPC H01L 23/544 (2013.01) [H01L 25/0657 (2013.01); H01L 2223/5446 (2013.01); H01L 2223/5448 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01); H10B 41/20 (2023.02); H10B 43/20 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A semiconductor wafer having an x-axis and a y-axis, the semiconductor wafer comprising:
a plurality of semiconductor dies comprising integrated circuits, each of the plurality of semiconductor dies comprising a length oriented along the y-axis and a width oriented along the x-axis, the length being longer than the width;
a first set of scribe lines oriented along the y-axis between adjacent semiconductor dies of the plurality of semiconductor dies;
a second set of scribe lines oriented along the x-axis between adjacent semiconductor dies of the plurality of semiconductor dies;
a plurality of grooves formed in the first set of scribe lines oriented along the y-axis, the plurality of grooves extending along a first portion the length of a first semiconductor die of the plurality of semiconductor dies, and along a second portion of a second semiconductor die of the plurality of semiconductor dies, the second semiconductor die being adjacent to the first semiconductor die along the y-axis;
wherein a groove of the plurality of grooves is formed to a depth which is greater than a thickness of the semiconductor wafer after the semiconductor wafer is thinned to its final thickness.