US 12,224,243 B2
Semiconductor memory device having word lines surrounded by memory layers and method of making the semiconductor memory device
Meng-Han Lin, Hsinchu (TW); and Chia-En Huang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Mar. 30, 2022, as Appl. No. 17/708,199.
Prior Publication US 2023/0317616 A1, Oct. 5, 2023
Int. Cl. H01L 23/535 (2006.01); H01L 23/528 (2006.01); H10B 51/20 (2023.01); H10B 51/30 (2023.01)
CPC H01L 23/535 (2013.01) [H01L 23/5283 (2013.01); H10B 51/20 (2023.02); H10B 51/30 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor memory device comprising:
a first memory unit including
two first source/bit line portions that extend in a first direction and that are separated from each other in a second direction perpendicular to the first direction,
a first word line that extends in the second direction and that surrounds the two first source/bit line portions,
a first memory film that surrounds the first word line, and
a first channel region that is disposed between the two first memory film and the first source/bit line portions;
a second memory unit disposed over the first memory unit in the first direction, and including
two second source/bit line portions that extend in the first direction and that are separated from each other in the second direction,
a second word line that extends in the second direction and that surrounds the two second source/bit line portions,
a second memory film that surrounds the second word line, and
a second channel region that is disposed between the second memory film and the two second source/bit line portions;
a first staircase via that penetrates the first memory film and that is electrically connected to the first word line; and
a second staircase via that penetrates the second memory film and that is electrically connected to the second word line.