| CPC H01L 23/5256 (2013.01) [H10B 20/25 (2023.02)] | 19 Claims |

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1. A memory device, comprising:
a transistor; and
a resistor electrically connected to the transistor, the transistor and the resistor forming a first one-time programmable (OTP) memory cell,
wherein the resistor includes a metal-based layer with a resistivity configured to irreversibly transition from a first resistance state to a second resistance state, and
wherein the metal-based layer has a first surface and a second surface, the first surface in direct contact with a via structure that is disposed between adjacent ones of a plurality of metallization layers, the second surface in direct contact with an interconnect structure that is disposed in one of the plurality of metallization layers, the first surface and the second surface being opposite to each other.
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