US 12,224,230 B2
Semiconductor devices and methods of manufacturing semiconductor devices
Yasuaki Yamada, Kumamoto (JP); and Hidenari Sato, Kumamoto (JP)
Assigned to Amkor Technology Singapore Holding Pte. Ltd., Singapore (SG)
Filed by Amkor Technology Singapore Holding Pte. Ltd., Valley Point (SG)
Filed on Sep. 16, 2021, as Appl. No. 17/476,672.
Prior Publication US 2023/0078615 A1, Mar. 16, 2023
Int. Cl. H01L 23/495 (2006.01); H01L 21/56 (2006.01); H01L 23/00 (2006.01); H01L 23/31 (2006.01)
CPC H01L 23/49517 (2013.01) [H01L 21/56 (2013.01); H01L 23/3121 (2013.01); H01L 24/32 (2013.01); H01L 24/40 (2013.01); H01L 24/84 (2013.01); H01L 2224/32503 (2013.01); H01L 2224/40247 (2013.01); H01L 2224/40507 (2013.01); H01L 2224/84205 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate comprising:
a substrate conductor material;
a terminal;
a pad; and
a substrate dielectric over the substrate conductor material;
an electronic component comprising:
an electronic component top side;
an electronic component bottom side opposite to the electronic component top side;
a first component terminal comprising a first component terminal conductor material adjacent to the electronic component top side; and
a second component terminal comprising a second component terminal material adjacent to the electronic component bottom side; and
an interconnect comprising:
an interconnect conductor material;
a component end; and
a substrate end;
wherein:
the second component terminal is attached to the pad with a first intermetallic bond;
the first intermetallic bond extends downward through the substrate dielectric;
the component end of the interconnect is attached to the first component terminal with a second intermetallic bond; and
the substrate end of the interconnect is attached to the terminal with a third intermetallic bond.